1. Field of the Invention:
The present invention relates to semiconductor structures for realising very high impedances for use in biasing devices, and in particular, but not exclusively, to semiconductor structures having high impedances for use in biasing high impedance loads such as capacitors, for example capacitive transducers such as MEMS microphones.
2. Description of the Related Art:
Consumer electronics devices are continually getting smaller and, with advances in technology, are gaining ever increasing performance and functionality. This is clearly evident in the technology used in consumer electronic products such as mobile phones, laptop computers, MP3 players and personal digital assistants (PDAs). Requirements of the mobile phone industry for example, are driving the components to become smaller with higher functionality and reduced cost. For example, some mobile phones now require multiple microphones for noise cancelling, or accelerometers to allow inertial navigation, while maintaining or reducing the small form factor and aiming at a similar total cost to previous generation phones.
This has encouraged the emergence of miniature transducers, initially electret microphones, more recently micro-electrical-mechanical systems (MEMS) based devices. These may be, for example, pressure sensors, ultrasonic transducers, accelerometers, and microphones. Many of these devices are capacitive transducers, comprising one or more membranes with electrodes for read-out/drive deposited on the membranes and/or a substrate. Relative movement of these electrodes modulates the capacitance between them, which then has to be detected by sensitive electronic amplifiers.
However, the miniature size of these transducers leads to very low capacitance values, of the order of 1 pf, for these transducers. This leads to a requirement for extremely high resistance values, of the order of Gigaohms (GΩ) or Teraohms (TΩ), for elements biasing the transducer if meaningful signals are to be sensed.
FIG. 1a shows a typical transducer circuit to illustrate this problem. A MEMS microphone transducer 10 comprises a capacitor 12 which is arranged, for example, to respond to incident audio pressure waves. The pressures waves displace at least one plate of the capacitor, and the resultant signal is received and amplified by an amplifier 14.
The top plate 7 of the capacitor 12 is biased by a fixed and clean voltage supply, Vbias 11, to say +12V for example. The bottom plate 9 of the MEMS capacitor 12 is biased with a lower d.c. voltage, say 0V for example, through a resistor 13 of resistance value R. However, at audio frequencies, looking into the amplifier and resistor 13, the capacitor 12 needs to see an impedance that is much greater than its own reactance at those audio frequencies, in order to avoid attenuation of the signal. In detail, the acoustically sourced audio signal can be modelled, as shown, as an a.c. voltage source 15 in series with the supply 11 and the MEMS capacitor 10. The amplifier input (and output) will exhibit a first-order high-pass filter response, with a −3 dB point at a corner frequency 1/(2.π.R.C). Thus, for a 20 Hz corner frequency, given a capacitor 12 of capacitance 1 pF, then a resistor 13 having a resistance R of 8 Gohm is required.
Preferably, the corner frequency is somewhat lower than 20 Hz so as to allow the thermal noise voltage density of such a high value resistor 13 to be attenuated by the low-pass filtering effect of itself and the capacitor 12. Again, for a capacitor 12 of capacitance 1 pF, a 0.1 Hz corner frequency is achieved by having a resistor 13 that has a resistance R of 160 Gohm which is required to reduce the noise contribution to 45 μV to 11.4 μV over 20 Hz to 20 kHz or from 11.7 to 2.6 μV of noise when A-weighted, as customary for audio noise measurements.
Such a high resistance, i.e. 8 Gohm or even 160 Gohm, is difficult to achieve in practice, especially on an integrated circuit. For example, assume designing a resistor having a resistance of 1 kohm/square which is to be laid out such that it has a width of 1 μm and 1 μm space between adjacent resistor strips, even an 8 Gohm resistor would require 16 mm2 of silicon area, compared to typical integrated transducers and amplifiers which are less than 1 mm2.
Various solutions have been proposed for implementation of this high impedance biasing function. FIG. 1b illustrates one solution. The resistor 13 of FIG. 1a is replaced by a pair of diodes 16, 18 connected in parallel and in opposite directions to one another. The diodes 16, 18 cooperate to provide a substantial resistance in order to bias the “low side” 9 of capacitor 12. For normal p-n silicon diodes, the slope resistance around zero volts is derived from the standard ideal diode equation to be (mkT/q)/Is, where “Is” is the junction saturation current of the diode and “m” is an empirical constant, approximately unity. Unfortunately, the diodes 16, 18 need to be very small in order to have a low enough capacitance relative to the sensor 10 capacitance so as not to attenuate the signal. Therefore, the saturation current of each of the diodes 16, 18 is usually of the order of 1 attoamp (aA), giving an equivalent resistance for the parallel combination in excess of 1016 ohms. So even for a capacitor 12 of 1 pf capacitance, this gives a time constant of over one hour. Thus, the time taken for the circuitry to settle out completely after start-up or some transient overload condition would be of this order. Also, even a femtoamp (fA) of leakage or photocurrent (or displacement current in the capacitor after some transient, such the pressure wave encountered by, for example, a door slamming in the near vicinity of the capacitive transducer 10) would give a shift of hundreds of millivolts (mV) at the input to the amplifier 14, which may saturate the amplifier 14 or following circuitry (not illustrated).
One known improvement is to use diodes based on junctions in a layer of polysilicon deposited on the field oxide of a silicon integrated circuit. FIG. 2a shows a known structure of such a polysilicon diode element 20 (referred to hereinafter as a “poly diode”).
The poly diode element 20 is disposed on a silicon dioxide layer 22, previously disposed on a silicon substrate 24. The poly diode element 20 itself comprises an n-type region 26 forming a p-n junction with a p-type region 28. If the n-type and p-type polysilicon regions are touching, low reverse breakdown voltages and/or high leakage of current are observed, as the n- and p-type regions 26, 28 are polycrystalline, creating effects at the grain boundaries. These disadvantages are mitigated by interposing an intervening drift region 30 of substantially intrinsic semiconductor material.
The n-type region 26 is electrically connected to an electrode 32, and the p-type region 28 is electrically connected to another electrode 34 through contact holes etched in an overlying insulating dielectric layer 35.
Typically this structure will be manufactured by first depositing a layer of intrinsic material, etching away superfluous material to leave a polysilicon region for the whole diode, then selectively implanting or diffusing n or p dopant on the respective portions of this intrinsic material. The insulating layer 35 is then deposited, and holes etched into it to accommodate the vertical elements of the metal electrodes 32, 34 which are then deposited to fill the holes and in patterns on the surface to connect with other circuit elements (not illustrated).
FIG. 2b shows a plan view of the poly diode element 20, showing the first and second electrodes 32, 34 contacting the poly diode.
Design rules imposed by semiconductor manufacturers place constraints on the size and positioning of the electrical contacts. For example, minimum dimensions are imposed on the size of the contact holes and between the edge of the contact hole of an electrode 32, 34 and the edge of the polysilicon element 20 and from the intrinsic polysilicon region as illustrated by labels s1, s2, s3. Such constraints are imposed to allow some degree of tolerance during placement of the photographic masks used to define electrodes 32, 34 and the tolerances of the process steps that etch the holes for their contacts.
A disadvantage of using a poly diode 20 in a high impedance biasing circuit for a capacitive transducer is that the saturation currents for the smallest poly diodes capable of being manufactured today are about 1 picoAmp (pA). The factor “m”, referred to above, is typically 2 rather than unity, but this still gives a zero-bias equivalent resistance (mkT/q)/Is of only 50 GΩ each, or 25 GΩ for their anti-parallel combination, which is still not quite high enough to filter out noise adequately, as described above.
It is therefore an aim of the present invention to provide a semiconductor structure for realising a high impedance which mitigates at least some of the above mentioned disadvantages.